BPLxPTH/BPLxPTL

Address Name Description DFF0E0 BPL1PTH Bit plane 1 pointer (high 5 bits) DFF0E2 BPL1PTL Bit plane 1 pointer (low 15 bits) DFF0E4 BPL2PTH Bit plane 2 pointer (high 5 bits) DFF0E6 BPL2PTL Bit plane 2 pointer (low 15 bits) DFF0E8 BPL3PTH Bit plane 3 pointer (high 5 bits) DFF0EA BPL3PTL Bit plane 3 pointer (low 15 bits) DFF0EC BPL4PTH Bit plane 4 pointer (high 5 bits) DFF0EE BPL4PTL Bit plane 4 pointer (low 15 bits) DFF0F0 BPL5PTH Bit plane 5 pointer (high 5 bits) DFF0F2 BPL5PTL Bit plane 5 pointer (low 15 bits) DFF0F4 BPL6PTH Bit plane 6 pointer (high 5 bits) DFF0F6 BPL6PTL Bit plane 6 pointer (low 15 bits) DFF0F8 BPL7PTH Bit plane 7 pointer (high 5 bits) DFF0FA BPL7PTL Bit plane 7 pointer (low 15 bits) DFF0FC BPL8PTH Bit plane 8 pointer (high 5 bits) DFF0FE BPL8PTL Bit plane 8 pointer (low 15 bits)

Overview

Address of bit plane DMA data. These pointers
must be reinitialized by the processor or coprocessor to point
in the beginning of bit plane date very vertical blank time.

• Hardware