BPLxDAT

Address Name Description DFF110 BPL1DAT Bit plane 1 data (parallel to serial convert) DFF112 BPL2DAT Bit plane 2 data (parallel to serial convert) DFF114 BPL3DAT Bit plane 3 data (parallel to serial convert) DFF116 BPL4DAT Bit plane 4 data (parallel to serial convert) DFF118 BPL5DAT Bit plane 5 data (parallel to serial convert) DFF11A BPL6DAT Bit plane 6 data (parallel to serial convert) DFF11C BPL7DAT Bit plane 7 data (parallel to serial convert) DFF11E BPL8DAT Bit plane 8 data (parallel to serial convert)

Overview

These registers receive the DMA data fetched from RAM by the bit
plane address pointers described above. They may also be rewritten
by either micro. They act as an 8 word parallel to serial buffer
for up to 8 memory 'bit planes'. x=1-8 the parallel to serial
conversion ID triggered whenever bitplane #1 is written, inducing
the completion of all bit planes for that word (16/32/64 pixels).
The MSB is output first, and is therefore always on the left.

• Hardware