||HIRES = High resolution (640*200/640*400 interlace)
||Bit planes use
||Hold and modify mode, now using either 6 or 8 bit
||Double playfield (PF1 = odd & PF2 = even bit planes)
now available in all resolutions.
(If BPU = 6 and HAM = 0 and DPF = 0 a special mode is
defined that allows bitplane 6 to cause an intensity
reduction of the other 5 bitplanes. The color
register output selected by 5 bitplanes is shifted
to half intensity by the 6th bit plane. This is
called EXTRA-HALFBRITE Mode.
||Enables color burst output signal
||Genlock audio enable. This level appears on the ZD
pin on denise during all blanking periods, unless ZDCLK
bit is set.
||Ultrahi res enables the UHRES pointers (for 1k*1k) also
needs bits in DMACON (hires chips only).
Disables hard stops for vert, horiz display windows.
||Super hi-res mode (35ns pixel width)
||Bit planes are scrolled and prioritized normally, but
bypass color table and 8 bit wide data appear on R(7:0).
||See above (BPUx)
||Light pen enable (reset on power up)
||Interlace enable (reset on power up)
||External resync (HSYNC, VSYNC pads become inputs)
(reset on power up)
||When low (default), the following bits in BPLCON3 are
disabled: BRDRBLNK,BRDNTRAN,ZDCLKEN,BRDSPRT, and
EXTBLKEN. These 5 bits can always be set by writing
to BPLCON3, however there effects are inhibited until
ECSENA goes high. This allows rapid context switching
between pre-ECS viewports and new ones.