AUDxLCH/AUDxLCL

Address Name Description DFF0A0 AUD0LCH Audio Channel 0 Location (high 5 bits) DFF0A2 AUD0LCL Audio Channel 0 Location (low 15 bits) DFF0B0 AUD1LCH Audio Channel 1 Location (high 5 bits) DFF0B2 AUD1LCL Audio Channel 1 Location (low 15 bits) DFF0C0 AUD2LCH Audio Channel 2 Location (high 5 bits) DFF0C2 AUD2LCL Audio Channel 2 Location (low 15 bits) DFF0D0 AUD3LCH Audio Channel 3 Location (high 5 bits) DFF0D2 AUD3LCL Audio Channel 3 Location (low 15 bits)

Overview

This pair of registers contains the 20 bit starting
address (location) of audio channel x (x = 0,1,2,3) DMA data.
This is not a pointer reg and therefore only needs to be
reloaded if a different memory location is to be outputted.

• Hardware